research
FPGA-based modulation and experimental control for high-frequency wide-bandgap power conversion.
FPGA modulation platform
My master’s research develops a reconfigurable control platform using a Digilent Basys 3 board with a Xilinx Artix-7 FPGA. The platform supports configurable PWM, four synchronized gate-control signals, programmable timing, dead-time insertion, and host configuration through a serial interface. An AXI4-Lite register architecture allows experimental parameters to be changed without recompiling the FPGA design.
The objective is deterministic and reusable modulation for power-electronics research: switching frequency, duty ratio, timing offsets, and dead time can be adjusted while preserving repeatable timing behavior.
Wide-bandgap power conversion
The FPGA controller is evaluated with existing experimental hardware incorporating GaN and SiC power devices. This work studies the interaction between digital timing, fast semiconductor transitions, gate-driver behavior, and converter performance at high switching frequencies.
The hybrid GaN-SiC switching hardware predates my contribution. My research extends and uses that platform as a validation environment; it does not claim original development of the complete switching hardware.
Experimental validation
The platform has progressed beyond simulation-only work. Buck-converter experiments have included operation from approximately 100 kHz to 500 kHz, capture of FPGA and power-stage waveforms, efficiency analysis, and investigation of commanded versus effective electrical dead time.
Measurements include gate signals, switch-node voltage, inductor current, converter input/output quantities, and oscilloscope CSV data. Observed efficiency decreased as switching frequency increased in the available test series; attributing that trend to individual loss mechanisms requires further measurements.
Current direction
The current development path is:
fixed PWM → configurable PWM → carrier/reference modulation → SPWM → inverter control → closed-loop control
Near-term priorities are a robust SPWM implementation, configurable carrier and reference parameters, complementary switching with safe dead time, and experimental inverter operation. Closed-loop regulation remains planned work rather than a completed result.
Research setup photographs, switching waveforms, and diagrams will be added when the original assets are available. No substitute or stock experimental imagery is used here.